00001
00059 #ifndef _RTTESTING_H
00060 #define _RTTESTING_H
00061
00062 #include <rtdm/rtdm.h>
00063
00064 #define RTTST_PROFILE_VER 1
00065
00066 typedef struct rttst_bench_res {
00067 long long avg;
00068 long min;
00069 long max;
00070 long overruns;
00071 long test_loops;
00072 } rttst_bench_res_t;
00073
00074 typedef struct rttst_interm_bench_res {
00075 struct rttst_bench_res last;
00076 struct rttst_bench_res overall;
00077 } rttst_interm_bench_res_t;
00078
00079 typedef struct rttst_overall_bench_res {
00080 struct rttst_bench_res result;
00081 long *histogram_avg;
00082 long *histogram_min;
00083 long *histogram_max;
00084 void *__padding;
00085 } rttst_overall_bench_res_t;
00086
00087 #define RTTST_TMBENCH_TASK 0
00088 #define RTTST_TMBENCH_HANDLER 1
00089
00090 typedef struct rttst_tmbench_config {
00091 int mode;
00092 int priority;
00093 nanosecs_rel_t period;
00094 int warmup_loops;
00095 int histogram_size;
00096 int histogram_bucketsize;
00097 int freeze_max;
00098 } rttst_tmbench_config_t;
00099
00100 #define RTTST_IRQBENCH_USER_TASK 0
00101 #define RTTST_IRQBENCH_KERNEL_TASK 1
00102 #define RTTST_IRQBENCH_HANDLER 2
00103 #define RTTST_IRQBENCH_HARD_IRQ 3
00104
00105 #define RTTST_IRQBENCH_SERPORT 0
00106 #define RTTST_IRQBENCH_PARPORT 1
00107
00108 typedef struct rttst_irqbench_config {
00109 int mode;
00110 int priority;
00111 int calibration_loops;
00112 unsigned int port_type;
00113 unsigned long port_ioaddr;
00114 unsigned int port_irq;
00115 } rttst_irqbench_config_t;
00116
00117 typedef struct rttst_irqbench_stats {
00118 unsigned long long irqs_received;
00119 unsigned long long irqs_acknowledged;
00120 } rttst_irqbench_stats_t;
00121
00122 #define RTTST_SWTEST_FPU 0x1
00123 #define RTTST_SWTEST_USE_FPU 0x2
00124
00125 struct rttst_swtest_task {
00126 unsigned index;
00127 unsigned flags;
00128 };
00129
00130 struct rttst_swtest_dir {
00131 unsigned from;
00132 unsigned to;
00133 };
00134
00135 struct rttst_swtest_error {
00136 struct rttst_swtest_dir last_switch;
00137 unsigned fp_val;
00138 };
00139
00140 #define RTIOC_TYPE_TESTING RTDM_CLASS_TESTING
00141
00145 #define RTDM_SUBCLASS_TIMERBENCH 0
00146 #define RTDM_SUBCLASS_IRQBENCH 1
00147 #define RTDM_SUBCLASS_SWITCHTEST 2
00148
00154 #define RTTST_RTIOC_INTERM_BENCH_RES \
00155 _IOWR(RTIOC_TYPE_TESTING, 0x00, struct rttst_interm_bench_res)
00156
00157 #define RTTST_RTIOC_TMBENCH_START \
00158 _IOW(RTIOC_TYPE_TESTING, 0x10, struct rttst_tmbench_config)
00159
00160 #define RTTST_RTIOC_TMBENCH_STOP \
00161 _IOWR(RTIOC_TYPE_TESTING, 0x11, struct rttst_overall_bench_res)
00162
00163 #define RTTST_RTIOC_IRQBENCH_START \
00164 _IOW(RTIOC_TYPE_TESTING, 0x20, struct rttst_irqbench_config)
00165
00166 #define RTTST_RTIOC_IRQBENCH_STOP \
00167 _IO(RTIOC_TYPE_TESTING, 0x21)
00168
00169 #define RTTST_RTIOC_IRQBENCH_GET_STATS \
00170 _IOR(RTIOC_TYPE_TESTING, 0x22, struct rttst_irqbench_stats)
00171
00172 #define RTTST_RTIOC_IRQBENCH_WAIT_IRQ \
00173 _IO(RTIOC_TYPE_TESTING, 0x23)
00174
00175 #define RTTST_RTIOC_IRQBENCH_REPLY_IRQ \
00176 _IO(RTIOC_TYPE_TESTING, 0x24)
00177
00178 #define RTTST_RTIOC_SWTEST_SET_TASKS_COUNT \
00179 _IOW(RTIOC_TYPE_TESTING, 0x30, unsigned long)
00180
00181 #define RTTST_RTIOC_SWTEST_SET_CPU \
00182 _IOW(RTIOC_TYPE_TESTING, 0x31, unsigned long)
00183
00184 #define RTTST_RTIOC_SWTEST_REGISTER_UTASK \
00185 _IOW(RTIOC_TYPE_TESTING, 0x32, struct rttst_swtest_task)
00186
00187 #define RTTST_RTIOC_SWTEST_CREATE_KTASK \
00188 _IOWR(RTIOC_TYPE_TESTING, 0x33, struct rttst_swtest_task)
00189
00190 #define RTTST_RTIOC_SWTEST_PEND \
00191 _IOR(RTIOC_TYPE_TESTING, 0x34, struct rttst_swtest_task)
00192
00193 #define RTTST_RTIOC_SWTEST_SWITCH_TO \
00194 _IOR(RTIOC_TYPE_TESTING, 0x35, struct rttst_swtest_dir)
00195
00196 #define RTTST_RTIOC_SWTEST_GET_SWITCHES_COUNT \
00197 _IOR(RTIOC_TYPE_TESTING, 0x36, unsigned long)
00198
00199 #define RTTST_RTIOC_SWTEST_GET_LAST_ERROR \
00200 _IOR(RTIOC_TYPE_TESTING, 0x37, struct rttst_swtest_error)
00201
00205 #endif